A Multi-process Design of Paging System
Author(s)
Huber, Andrew R.Abstract
This thesis presents a design for a paging system that may be used to implement a virtual memory on a large scale, demand paged computer utility. A model for such a computer system with a multi-level, hierarchical memory system is presented. The functional requirements of a paging system for such a model are discussed, with emphasis on the parallelism inherent in the algorithms used to implement the memory management functions.
Date issued
1976-12Series/Report no.
MIT-LCS-TR-171