A Switch-level Simulation Model for Integrated Logic Circuits
| dc.contributor.advisor | Dennis, Jack B. | en_US |
| dc.contributor.author | Bryant, Randal Everitt | en_US |
| dc.date.accessioned | 2023-03-29T15:05:24Z | |
| dc.date.available | 2023-03-29T15:05:24Z | |
| dc.date.issued | 1981-03 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/149539 | |
| dc.description.abstract | Switch-level simulators model a metal oxide semiconductor (MOS) large scale integrated (LSI) circuits as a network of transistor "switches". They can simulate many aspects of MOS circuits which cannot be expressed in the Boolean logic gate model, such as bidrecttional pass transistors, dynamic storage, and charge sharing. | en_US |
| dc.relation.ispartofseries | MIT-LCS-TR-259 | |
| dc.title | A Switch-level Simulation Model for Integrated Logic Circuits | en_US |
| dc.identifier.oclc | 8017287 |
