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The Impact of Layer Assignment Methods on Layout Algorithms for Integrated Circuits

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Author(s)
Pinter, Ron Yair
Advisor(s)
Leiserson, Charles E.
Date Issued
August 1983
Series/Report no.
MIT-LCS-TR-291
Abstract
Programs for integrated circuit layout at the module assembly level are typically decomposed into two phases - placement and routing. In this thesis we investigate a third phase which is often implicitly assumed - layer assignment. This thesis studies how layer assignment methodologies interact with placement and routing.
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