Logic Simulation of a Multiprocessor

Abstract

The performance of circuit simulators running on SISD computers is fundamentally limited by the Von Neumann bottleneck. Multiprocessors do not share this limitation. The task of solving the equations for the many parallel signal paths found in most circuits lends itself readily to concurrent computation. for both of these reasons, parallel processing is a highly promising approach to circuit simulation. This thesis explores several facets of this problem.