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dc.contributor.authorChung, Jinwook
dc.contributor.authorLu, Bin
dc.contributor.authorPalacios, Tomas
dc.date.accessioned2010-04-16T20:36:53Z
dc.date.available2010-04-16T20:36:53Z
dc.date.issued2009-11
dc.date.submitted2009-10
dc.identifier.isbn978-1-4244-5191-3
dc.identifier.issn1550-8781
dc.identifier.otherINSPEC Accession Number: 10964147
dc.identifier.urihttp://hdl.handle.net/1721.1/53730
dc.description.abstractThe high thermal stability of nitride semiconductors allows for the on-wafer integration of (001)Si CMOS electronics and electronic devices based on these semiconductors. This paper describes the technology developed at MIT to seamlessly integrate GaN and Si transistors in very close proximity (<5 mum). This integration, the first of any III-V field effect transistor with (001) Si electronics, enables tremendous new possibilities to circuit and system designers. For example, we will study the use of hybrid GaN-Si circuits to improve the power distribution networks in Si microprocessors.en
dc.description.sponsorshipSemiconductor Research Corporationen
dc.description.sponsorshipFocus Center Research Programen
dc.description.sponsorshipInterconnect Focus Centeren
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen
dc.relation.isversionofhttp://dx.doi.org/10.1109/csics.2009.5315780en
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en
dc.sourceIEEEen
dc.titleOn-wafer seamless integration of GaN and Si (100) electronicsen
dc.typeArticleen
dc.identifier.citationJin Wook Chung, Bin Lu, and T. Palacios. “On-Wafer Seamless Integration of GaN and Si (100) Electronics.” Compound Semiconductor Integrated Circuit Symposium, 2009. CISC 2009. Annual IEEE. 2009. 1-4. ©2009 Institute of Electrical and Electronics Engineers.en
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverPalacios, Tomas
dc.contributor.mitauthorChung, Jinwook
dc.contributor.mitauthorLu, Bin
dc.contributor.mitauthorPalacios, Tomas
dc.relation.journalAnnual IEEE Compound Semiconductor Integrated Circuit Symposium, 2009. CISC 2009.en
dc.eprint.versionFinal published versionen
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen
eprint.statushttp://purl.org/eprint/status/PeerRevieweden
dspace.orderedauthorsChung, Jin Wook; Lu, Bin; Palacios, Tomasen
dc.identifier.orcidhttps://orcid.org/0000-0002-2190-563X
dc.identifier.orcidhttps://orcid.org/0000-0003-2208-0665
mit.licensePUBLISHER_POLICYen


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