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Wafer-scale 3D integration of InGaAs image sensors with Si readout circuits

dc.contributor.authorShaver, David C.
dc.contributor.authorKeast, Craig L.
dc.contributor.authorWheeler, Bruce D.
dc.contributor.authorHu, WeiLin
dc.contributor.authorBolkhovsky, Vladimir
dc.contributor.authorBerger, Robert
dc.contributor.authorSuntharalingam, Vyshnavi
dc.contributor.authorSoares, Antonio M.
dc.contributor.authorDonnelly, Joseph P.
dc.contributor.authorMahoney, Leonard J.
dc.contributor.authorOakley, Douglas C.
dc.contributor.authorChapman, David C.
dc.contributor.authorKnecht, Jeffrey M.
dc.contributor.authorYost, Donna-Ruth W.
dc.contributor.authorChen, Chang-Lee
dc.date.accessioned2010-04-27T20:43:12Z
dc.date.available2010-04-27T20:43:12Z
dc.date.issued2009-10
dc.date.submitted2009-09
dc.identifier.isbn978-1-4244-4511-0
dc.identifier.isbn978-1-4244-4512-7
dc.identifier.otherINSPEC Accession Number: 10943264
dc.identifier.urihttp://hdl.handle.net/1721.1/54241
dc.description.abstractIn this work, we modified our wafer-scale 3D integration technique, originally developed for Si, to hybridize InP-based image sensor arrays with Si readout circuits. InGaAs image arrays based on the InGaAs layer grown on InP substrates were fabricated in the same processing line as silicon-on-insulator (SOI) readout circuits. The finished 150-mm-diameter InP wafer was then directly bonded to the SOI wafer and interconnected to the Si readout circuits by 3D vias. A 1024 times 1024 diode array with 8-mum pixel size is demonstrated. This work shows the wafer-scale 3D integration of a compound semiconductor with Si.en
dc.description.sponsorshipDefence Advanced Research Projects Agency (Air Force Contract FA8721-05-C-0002)en
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen
dc.relation.isversionofhttp://dx.doi.org/10.1109/3DIC.2009.5306556en
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en
dc.sourceIEEEen
dc.titleWafer-scale 3D integration of InGaAs image sensors with Si readout circuitsen
dc.typeArticleen
dc.identifier.citationChen, C.L. et al. "Wafer-Scale 3D Integration of InGaAs Image Sensors with Si Readout Circuits." IEEE International Conference on 3D System Integration, 2009. 3DIC 2009. p.1-4. ©2009 Institute of Electrical and Electronics Engineers.en
dc.contributor.departmentLincoln Laboratoryen_US
dc.contributor.approverChen, Chang-Lee
dc.contributor.mitauthorShaver, David C.
dc.contributor.mitauthorKeast, Craig L.
dc.contributor.mitauthorWheeler, Bruce D.
dc.contributor.mitauthorHu, WeiLin
dc.contributor.mitauthorBolkhovsky, Vladimir
dc.contributor.mitauthorBerger, Robert
dc.contributor.mitauthorSuntharalingam, Vyshnavi
dc.contributor.mitauthorSoares, Antonio M.
dc.contributor.mitauthorDonnelly, Joseph P.
dc.contributor.mitauthorMahoney, Leonard J.
dc.contributor.mitauthorOakley, Douglas C.
dc.contributor.mitauthorChapman, David C.
dc.contributor.mitauthorKnecht, Jeffrey M.
dc.contributor.mitauthorYost, Donna-Ruth W.
dc.contributor.mitauthorChen, Chang-Lee
dc.relation.journalIEEE International Conference on 3D System Integration, 2009. 3DIC 2009.en
dc.eprint.versionFinal published versionen
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen
eprint.statushttp://purl.org/eprint/status/PeerRevieweden
dspace.orderedauthorsChen, C.L.; Yost, D-R.; Knecht, J.M.; Chapman, D.C.; Oakley, D.C.; Mahoney, L.J.; Donnelly, J.P.; Soares, A.M.; Suntharalingam, V.; Berger, R.; Bolkhovsky, V.; Hu, W.; Wheeler, B.D.; Keast, C.L.; Shaver, D.C.en
mit.licensePUBLISHER_POLICYen
mit.metadata.statusComplete


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