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A Low Temperature Fully Lithographic Process For Metal–Oxide Field-Effect Transistors

dc.contributor.authorSodini, Charles G.
dc.contributor.authorBulovic, Vladimir
dc.contributor.authorAkinwande, Akintunde Ibitayo
dc.contributor.authorWang, Annie I.
dc.contributor.authorYaglioglu, Burag
dc.date.accessioned2010-09-28T13:44:52Z
dc.date.available2010-09-28T13:44:52Z
dc.date.issued2009-12
dc.date.submitted2009-05
dc.identifier.issn1551-319X
dc.identifier.urihttp://hdl.handle.net/1721.1/58726
dc.description.abstractWe report a low temperature ( ~ 100à °C) lithographic method for fabricating hybrid metal oxide/organic field-effect transistors (FETs) that combine a zinc-indium-oxide (ZIO) semiconductor channel and organic, parylene, dielectric layer. The transistors show a field-effect mobility of (12à ±0.8) cm2 V-1 s-1, on/off ratio of 108 and turn-off voltage of Voff = -1 V. This work demonstrates that organic and inorganic layers can be deposited and patterned using a low temperature budget, integrated lithographic process to make FETs suitable for large area electronic applications.en_US
dc.description.sponsorshipUnited States. Defense Advanced Research Projects Agency. Microsystems Technology Officeen_US
dc.description.sponsorshipHewlett-Packard Companyen_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/JDT.2009.2029059en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceMIT Web Domainen_US
dc.subjectintegrated lithographic processen_US
dc.subjectlarge area electronic applicationsen_US
dc.subjectlow temperature fully lithographic processen_US
dc.subjectmetal-oxide field-effect transistorsen_US
dc.subjectzinc-indium-oxide semiconductor channelen_US
dc.subjectamorphous semiconductorsen_US
dc.subjectThin-film transistors (TFTs)en_US
dc.titleA Low Temperature Fully Lithographic Process For Metal–Oxide Field-Effect Transistorsen_US
dc.typeArticleen_US
dc.identifier.citationWang, A.; Yaglioglu, B.; Sodini, C.G.; Bulovic, V.; Akinwande, A.I.; , "A Low Temperature Fully Lithographic Process For Metal–Oxide Field-Effect Transistors," Display Technology, Journal of , vol.6, no.1, pp.22-26, Jan. 2010 © Copyright 2010 IEEEen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverBulovic, Vladimir
dc.contributor.mitauthorSodini, Charles G.
dc.contributor.mitauthorBulovic, Vladimir
dc.contributor.mitauthorAkinwande, Akintunde Ibitayo
dc.contributor.mitauthorWang, Annie I.
dc.contributor.mitauthorYaglioglu, Burag
dc.relation.journalJournal of Display Technologyen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsWang, Annie; Yaglioglu, Burag; Sodini, Charles G.; Bulovic, Vladimir; Akinwande, Akintunde I.en
dc.identifier.orcidhttps://orcid.org/0000-0003-3001-9223
dc.identifier.orcidhttps://orcid.org/0000-0002-0960-2580
dc.identifier.orcidhttps://orcid.org/0000-0003-0349-9460
dc.identifier.orcidhttps://orcid.org/0000-0002-0413-8774
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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