Fabrication and process characterization of atom transistor chips
Author(s)
Bright, V. M.; Anderson, D. Z.; Salim, E. A.; Chuang, H. C.; Vuletic, Vladan
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This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200 nm. The wires can carry current densities of more than 7.5times10[superscript 7] A/cm[superscript 2]. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.
Date issued
2009-10Department
Massachusetts Institute of Technology. Department of Physics; MIT-Harvard Center for Ultracold AtomsJournal
Proceedings of the Solid-State Sensors, Actuators and Microsystems Conference, 2009
Publisher
Institute of Electrical and Electronics Engineers
Citation
Chuang, H.C. et al. “Fabrication and process characterization of atom transistor chips.” Solid-State Sensors, Actuators and Microsystems Conference, 2009. TRANSDUCERS 2009. International. 2009. 1305-1308. © 2009 IEEE
Version: Final published version
Other identifiers
INSPEC Accession Number: 10917191
ISBN
978-1-4244-4190-7
978-1-4244-4193-8
Keywords
Atom Chips, Atom Transistor, Atom Tunneling, Bose-Einstein Condensation (BEC), E-Beam Lithography, Suspended Nanowires