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dc.contributor.authordel Alamo, Jesus A.
dc.contributor.authorKim, Dae-Hyun
dc.contributor.authorKharche, Neerav
dc.contributor.authorLuisier, Mathieu
dc.date.accessioned2010-10-21T19:39:42Z
dc.date.available2010-10-21T19:39:42Z
dc.date.issued2010-03
dc.date.submitted2009-12
dc.identifier.isbn978-1-4244-5640-6
dc.identifier.isbn978-1-4244-5639-0
dc.identifier.otherINSPEC Accession Number: 11207514
dc.identifier.urihttp://hdl.handle.net/1721.1/59451
dc.description.abstractThe scaling behavior of ultra-scaled InAs HEMTs is investigated using a 2-dimensional real-space effective mass ballistic quantum transport simulator. The simulation methodology is first benchmarked against experimental Id-Vgs data obtained from devices with gate lengths ranging from 30 to 50 nm, where a good quantitative match is obtained. It is then applied to optimize the logic performance of not-yet-fabricated 20 nm InAs HEMT. It is demonstrated that the best performance is achieved in thin InAs channel devices by reducing the insulator thickness to improve the gate control while increasing the gate work function to suppress the gate leakage.en_US
dc.description.sponsorshipSemiconductor Research Corporationen_US
dc.description.sponsorshipSemiconductor Research Corporation. Center for Materials, Structures and Devicesen_US
dc.description.sponsorshipPurdue University. Network for Computational Nanotechnologyen_US
dc.description.sponsorshipNational Institute for Computational Sciences (U.S.)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/IEDM.2009.5424315en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titlePerformance analysis of ultra-scaled InAs HEMTsen_US
dc.typeArticleen_US
dc.identifier.citationKharche, N. et al. “Performance analysis of ultra-scaled InAs HEMTs.” Electron Devices Meeting (IEDM), 2009 IEEE International. 2009. 1-4. © 2010 Institute of Electrical and Electronics Engineers.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverdel Alamo, Jesus A.
dc.contributor.mitauthordel Alamo, Jesus A.
dc.contributor.mitauthorKim, Dae-Hyun
dc.relation.journal2009 IEEE International Electron Devices Meeting (IEDM)en_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsKharche, Neerav; Klimeck, Gerhard; Kim, Dae-Hyun; del Alamo, Jesus. A.; Luisier, Mathieuen
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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