A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS
Author(s)
Stojanovic, Vladimir Marko; Kim, Byungsub
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This paper presents a transceiver for fast and energy-efficient global on-chip communication, consisting of a nonlinear charge-injecting (CI) 3-tap transmit filter (TX) and a sampling receiver (RX) with transimpedance pre-amplifier (TIA). Recently, pre-emphasis techniques have demonstrated significantly better energy-efficiency than repeater interconnects. To further improve energy-efficiency over pre-emphasis techniques that require analog subtraction, our TX selects a pattern-dependent current to inject into the wire, performing feed-forward equalization (FFE) while mitigating the nonlinearity of the driver. This 3-tap charge-injecting (CI) FFE enables stronger equalization than the capacitively driven TX or edge-detection pre-emphasis, achieving data-rate of 4 Gb/s over a 1 cm on-chip wire. The TIA at RX improves bandwidth, signal amplitude, and reduces bias power, breaking the trade-offs in conventional resistor termination, and mitigates equalized signal degradation due to impedance changes in dynamic current sensing.
Date issued
2009-05Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer ScienceJournal
IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009
Publisher
Institute of Electrical and Electronics Engineers
Citation
Byungsub Kim, and V. Stojanovic. “A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS.” Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International. 2009. 66-67,67a. ©2009 Institute of Electrical and Electronics Engineers.
Version: Final published version
Other identifiers
INSPEC Accession Number: 10727898
ISBN
978-1-4244-3458-9