| dc.contributor.author | Orcutt, Jason Scott | |
| dc.contributor.author | Ram, Rajeev J. | |
| dc.date.accessioned | 2011-03-21T21:17:21Z | |
| dc.date.available | 2011-03-21T21:17:21Z | |
| dc.date.issued | 2010-03 | |
| dc.date.submitted | 2009-11 | |
| dc.identifier.issn | 1041-1135 | |
| dc.identifier.other | INSPEC Accession Number: 11180069 | |
| dc.identifier.uri | http://hdl.handle.net/1721.1/61756 | |
| dc.description.abstract | A design methodology to layout photonic devices within standard electronic complementary metal-oxide-semiconductor (CMOS) foundry data preparation flows is described. This platform has enabled the fabrication of designs in three foundry scaled-CMOS processes from two semiconductor manufacturers. | en_US |
| dc.description.sponsorship | United States. Defense Advanced Research Projects Agency (DARPA) | en_US |
| dc.description.sponsorship | National Science Foundation (U.S.) | en_US |
| dc.language.iso | en_US | |
| dc.publisher | Institute of Electrical and Electronics Engineers | en_US |
| dc.relation.isversionof | http://dx.doi.org/10.1109/lpt.2010.2041445 | en_US |
| dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
| dc.source | IEEE | en_US |
| dc.title | Photonic Device Layout Within the Foundry CMOS Design Environment | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Orcutt, J.S., and R.J. Ram. “Photonic Device Layout Within the Foundry CMOS Design Environment.” Photonics Technology Letters, IEEE 22.8 (2010): 544-546. © Copyright 2010 IEEE | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Research Laboratory of Electronics | en_US |
| dc.contributor.approver | Ram, Rajeev J. | |
| dc.contributor.mitauthor | Orcutt, Jason Scott | |
| dc.contributor.mitauthor | Ram, Rajeev J. | |
| dc.relation.journal | IEEE Photonics Technology Letters | en_US |
| dc.eprint.version | Final published version | en_US |
| dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
| eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
| dspace.orderedauthors | Orcutt, Jason S.; Ram, Rajeev J. | en |
| dc.identifier.orcid | https://orcid.org/0000-0003-0420-2235 | |
| mit.license | PUBLISHER_POLICY | en_US |
| mit.metadata.status | Complete | |
