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dc.contributor.authorLu, Bin
dc.contributor.authorSaadat, Omair Irfan
dc.contributor.authorPalacios, Tomas
dc.date.accessioned2012-05-22T19:18:42Z
dc.date.available2012-05-22T19:18:42Z
dc.date.issued2010-06
dc.date.submitted2010-06
dc.identifier.issn0741-3106
dc.identifier.issn1558-0563
dc.identifier.otherINSPEC Accession Number: 11477383
dc.identifier.urihttp://hdl.handle.net/1721.1/70906
dc.description.abstractIn this letter, we present a new AlGaN/GaN enhancement-mode (E-mode) transistor based on a dual-gate structure. The dual gate allows the transistor to combine an E-mode behavior with low on-resistance and very high breakdown voltage. The device utilizes an integrated gate structure with a short gate controlling the threshold voltage and a long gate supporting the high-voltage drop from the drain. Using this new dual-gate technology, AlGaN/GaN E-mode transistors grown on a Si substrate have demonstrated a high threshold voltage of 2.9 V with a maximum drain current of 434 mA/mm and a specific on-resistance of 4.3 m Ω·cm2 at a breakdown voltage of 643 V.en_US
dc.description.sponsorshipUnited States. Dept. of Energy (GIGA Project)en_US
dc.description.sponsorshipMassachusetts Institute of Technology. Energy Initiativeen_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/led.2010.2055825en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titleHigh-Performance Integrated Dual-Gate AlGaN/GaN Enhancement-Mode Transistoren_US
dc.typeArticleen_US
dc.identifier.citationLu, Bin, Omair Irfan Saadat, and Tomás Palacios. “High-Performance Integrated Dual-Gate AlGaN/GaN Enhancement-Mode Transistor.” IEEE Electron Device Letters 31.9 (2010): 990–992. Web. © 2010 IEEE.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverPalacios, Tomas
dc.contributor.mitauthorPalacios, Tomas
dc.contributor.mitauthorLu, Bin
dc.contributor.mitauthorSaadat, Omair Irfan
dc.relation.journalIEEE Electron Device Lettersen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsLu, Bin; Saadat, Omair Irfan; Palacios, Tomásen
dc.identifier.orcidhttps://orcid.org/0000-0002-2190-563X
dc.identifier.orcidhttps://orcid.org/0000-0003-2208-0665
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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