The prospects for 10 nm III-V CMOS

Author(s)
del Alamo, Jesus A.; Kim, D.-H.
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Abstract
The increasing difficulties for further scaling down of Si CMOS is bringing to the fore the investigation of alternative channel materials. Among these, III-V compound semiconductors are very attractive due to their outstanding electron transport properties. This paper briefly reviews the prospects and the challenges for a III-V CMOS technology with gate lengths in the 10 nm range.
Date issued
2010-04
URI
http://hdl.handle.net/1721.1/71580
Department
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Journal
International Symposium on VLSI Technology Systems and Applications (VLSI-TSA), 2010
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
del Alamo, J. A., and D.-H. Kim. “The prospects for 10 nm III-V CMOS.” IEEE, 2010. 166-167.
Version: Author's final manuscript
Other identifiers
INSPEC Accession Number: 11501058
ISBN
978-1-4244-5065-7
978-1-4244-5063-3
ISSN
1930-885X
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