dc.contributor.author | Psota, James R. | |
dc.contributor.author | Miller, Jason E. | |
dc.contributor.author | Kurian, George | |
dc.contributor.author | Hoffman, Henry | |
dc.contributor.author | Beckmann, Nathan Zachary | |
dc.contributor.author | Eastep, Jonathan Michael | |
dc.contributor.author | Agarwal, Anant | |
dc.date.accessioned | 2012-08-08T19:49:50Z | |
dc.date.available | 2012-08-08T19:49:50Z | |
dc.date.issued | 2010-08 | |
dc.date.submitted | 2010-05 | |
dc.identifier.isbn | 978-1-4244-5308-5 | |
dc.identifier.issn | 978-1-4244-5309-2 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/72049 | |
dc.description.abstract | Given the current trends in multicore scaling, chips with 1000 cores may exist within the next 5 to 10 years. However, their promise of increased performance will only be reached if their inherent scaling and programming challenges are overcome. Meanwhile, recent advances in nanophotonic device manufacturing are making CMOS-integrated optics a reality-interconnect technology which can provide more bandwidth at lower power than conventional electronics. Perhaps more importantly, optical interconnect also has the potential to enable new, easy-to-use programming models enabled by its inexpensive broadcast mechanism. This paper introduces ATAC, a new manycore architecture that capitalizes on the recent advances in optics to address a number of challenges that future manycore designs will face. The new constraints and opportunities of on-chip optical interconnect are presented and explored in the design of ATAC. Furthermore, this paper discusses ATAC's programming models, and introduces Consumer Tagging, a novel programming model that leverages ATAC's strengths to provide high performance and scalability. | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/ISCAS.2010.5537892 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | IEEE | en_US |
dc.title | ATAC: Improving performance and programmability | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Psota, James et al. “ATAC: Improving performance and programmability with on-chip optical networks.” IEEE, 2010. 3325-3328. ©2010 IEEE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Agarwal, Anant | |
dc.contributor.mitauthor | Psota, James R. | |
dc.contributor.mitauthor | Miller, Jason E. | |
dc.contributor.mitauthor | Kurian, George | |
dc.contributor.mitauthor | Hoffman, Henry | |
dc.contributor.mitauthor | Beckmann, Nathan Zachary | |
dc.contributor.mitauthor | Eastep, Jonathan Michael | |
dc.contributor.mitauthor | Agarwal, Anant | |
dc.relation.journal | Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS) | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
dspace.orderedauthors | Psota, James; Miller, Jason; Kurian, George; Hoffman, Henry; Beckmann, Nathan; Eastep, Jonathan; Agarwal, Anant | en |
dc.identifier.orcid | https://orcid.org/0000-0002-7015-4262 | |
dc.identifier.orcid | https://orcid.org/0000-0002-6057-9769 | |
dc.identifier.orcid | https://orcid.org/0000-0003-1371-7177 | |
dspace.mitauthor.error | true | |
mit.license | PUBLISHER_POLICY | en_US |
mit.metadata.status | Complete | |