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dc.contributor.authorPsota, James R.
dc.contributor.authorMiller, Jason E.
dc.contributor.authorKurian, George
dc.contributor.authorHoffman, Henry
dc.contributor.authorBeckmann, Nathan Zachary
dc.contributor.authorEastep, Jonathan Michael
dc.contributor.authorAgarwal, Anant
dc.date.accessioned2012-08-08T19:49:50Z
dc.date.available2012-08-08T19:49:50Z
dc.date.issued2010-08
dc.date.submitted2010-05
dc.identifier.isbn978-1-4244-5308-5
dc.identifier.issn978-1-4244-5309-2
dc.identifier.urihttp://hdl.handle.net/1721.1/72049
dc.description.abstractGiven the current trends in multicore scaling, chips with 1000 cores may exist within the next 5 to 10 years. However, their promise of increased performance will only be reached if their inherent scaling and programming challenges are overcome. Meanwhile, recent advances in nanophotonic device manufacturing are making CMOS-integrated optics a reality-interconnect technology which can provide more bandwidth at lower power than conventional electronics. Perhaps more importantly, optical interconnect also has the potential to enable new, easy-to-use programming models enabled by its inexpensive broadcast mechanism. This paper introduces ATAC, a new manycore architecture that capitalizes on the recent advances in optics to address a number of challenges that future manycore designs will face. The new constraints and opportunities of on-chip optical interconnect are presented and explored in the design of ATAC. Furthermore, this paper discusses ATAC's programming models, and introduces Consumer Tagging, a novel programming model that leverages ATAC's strengths to provide high performance and scalability.en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/ISCAS.2010.5537892en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titleATAC: Improving performance and programmabilityen_US
dc.typeArticleen_US
dc.identifier.citationPsota, James et al. “ATAC: Improving performance and programmability with on-chip optical networks.” IEEE, 2010. 3325-3328. ©2010 IEEEen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverAgarwal, Anant
dc.contributor.mitauthorPsota, James R.
dc.contributor.mitauthorMiller, Jason E.
dc.contributor.mitauthorKurian, George
dc.contributor.mitauthorHoffman, Henry
dc.contributor.mitauthorBeckmann, Nathan Zachary
dc.contributor.mitauthorEastep, Jonathan Michael
dc.contributor.mitauthorAgarwal, Anant
dc.relation.journalProceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS)en_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
dspace.orderedauthorsPsota, James; Miller, Jason; Kurian, George; Hoffman, Henry; Beckmann, Nathan; Eastep, Jonathan; Agarwal, Ananten
dc.identifier.orcidhttps://orcid.org/0000-0002-7015-4262
dc.identifier.orcidhttps://orcid.org/0000-0002-6057-9769
dc.identifier.orcidhttps://orcid.org/0000-0003-1371-7177
dspace.mitauthor.errortrue
mit.licensePUBLISHER_POLICYen_US
mit.metadata.statusComplete


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