High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate
Author(s)
Kazior, T. E.; LaRoche, J. R.; Urteaga, M.; Bergman, J.; Choe, M. J.; Lee, K. J.; Seong, T.; Seo, M.; Yen, A.; Lubyshev, D.; Fastenau, J. M.; Liu, W. K.; Smith, D.; Clark, D.; Thompson, R.; Bulsara, Mayank; Fitzgerald, Eugene A.; Drazek, C.; Guiot, E.; ... Show more Show less
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We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).
Date issued
2010-10Department
MIT Materials Research Laboratory; Massachusetts Institute of Technology. Department of Materials Science and EngineeringJournal
2010 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)
Publisher
Institute of Electrical and Electronics Engineers
Citation
Kazior, T. E., J. R. LaRoche, M. Urteaga, J. Bergman, M. J. Choe, K. J. Lee, T. Seong, et al. “High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate.” In 2010 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), Monterey, CA, USA, 3-6 October 2010, 1-4. Institute of Electrical and Electronics Engineers, 2010. © Copyright 2010 IEEE.
Version: Final published version
Other identifiers
INSPEC Accession Number: 11630792
ISBN
978-1-4244-7437-0
978-1-4244-7436-3