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Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors

Author(s)
Kinsy, Michel A.; Pellauer, Michael; Devadas, Srinivas
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Abstract
This paper presents Heracles, an open-source, functional, parameterized, synthesizable multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile research and teaching tool for architectural exploration and hardware-software co-design. The Heracles toolkit comprises the soft hardware (HDL) modules, application compiler, and graphical user interface. It is designed with a high degree of modularity to support fast exploration of future multicore processors of di erent topologies, routing schemes, processing elements (cores), and memory system organizations. It is a component-based framework with parameterized interfaces and strong emphasis on module reusability. The compiler toolchain is used to map C or C++ based applications onto the processing units. The GUI allows the user to quickly con gure and launch a system instance for easy factorial development and evaluation. Hardware modules are implemented in synthesizable Verilog and are FPGA platform independent. The Heracles tool is freely available under the open-source MIT license at: http://projects.csail.mit.edu/heracles
Date issued
2013-02
URI
http://hdl.handle.net/1721.1/86169
Department
Lincoln Laboratory; Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Journal
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13)
Publisher
Association for Computing Machinery (ACM)
Citation
Michel A. Kinsy, Michael Pellauer, and Srinivas Devadas. 2013. Heracles: a tool for fast RTL-based design space exploration of multicore processors. In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13). ACM, New York, NY, USA, 125-134.
Version: Author's final manuscript
ISBN
9781450318877

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