dc.contributor.author | Kinsy, Michel A. | |
dc.contributor.author | Pellauer, Michael | |
dc.contributor.author | Devadas, Srinivas | |
dc.date.accessioned | 2014-04-14T19:05:42Z | |
dc.date.available | 2014-04-14T19:05:42Z | |
dc.date.issued | 2013-02 | |
dc.identifier.isbn | 9781450318877 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/86169 | |
dc.description.abstract | This paper presents Heracles, an open-source, functional, parameterized, synthesizable multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile research and teaching tool for architectural exploration and hardware-software co-design. The Heracles toolkit comprises the soft hardware (HDL) modules, application compiler, and graphical user interface. It is designed with a high degree of modularity to support fast exploration of future multicore processors of di erent topologies, routing schemes, processing elements (cores), and memory system organizations. It is a component-based framework with parameterized interfaces and strong emphasis on module reusability. The compiler toolchain is used to map C or C++ based applications onto the processing units. The GUI allows the user to quickly con gure and launch a system instance for easy factorial development and evaluation. Hardware modules are implemented in synthesizable Verilog and are FPGA platform independent. The Heracles tool is freely available under the open-source MIT license at: http://projects.csail.mit.edu/heracles | en_US |
dc.language.iso | en_US | |
dc.publisher | Association for Computing Machinery (ACM) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1145/2435264.2435287 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | MIT web domain | en_US |
dc.title | Heracles: A Tool for Fast RTL-Based Design Space Exploration of Multicore Processors | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Michel A. Kinsy, Michael Pellauer, and Srinivas Devadas. 2013. Heracles: a tool for fast RTL-based design space exploration of multicore processors. In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13). ACM, New York, NY, USA, 125-134. | en_US |
dc.contributor.department | Lincoln Laboratory | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.mitauthor | Kinsy, Michel A. | en_US |
dc.contributor.mitauthor | Devadas, Srinivas | en_US |
dc.relation.journal | Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '13) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Kinsy, Michel A.; Pellauer, Michael; Devadas, Srinivas | en_US |
dc.identifier.orcid | https://orcid.org/0000-0001-8253-7714 | |
dc.identifier.orcid | https://orcid.org/0000-0003-4301-1159 | |
mit.license | OPEN_ACCESS_POLICY | en_US |
mit.metadata.status | Complete | |