Show simple item record

dc.contributor.authorChen, Yu-Hsin
dc.contributor.authorSze, Vivienne
dc.date.accessioned2015-01-13T20:39:33Z
dc.date.available2015-01-13T20:39:33Z
dc.date.issued2014-10
dc.identifier.issn1051-8215
dc.identifier.issn1558-2205
dc.identifier.urihttp://hdl.handle.net/1721.1/92837
dc.description.abstractHigh Efficiency Video Coding (HEVC) is the latest video coding standard that specifies video resolutions up to 8K Ultra-HD (UHD) at 120 fps to support the next decade of video applications. This results in high-throughput requirements for the context adaptive binary arithmetic coding (CABAC) entropy decoder, which was already a well-known bottleneck in H.264/AVC. To address the throughput challenges, several modifications were made to CABAC during the standardization of HEVC. This work leverages these improvements in the design of a high-throughput HEVC CABAC decoder. It also supports the high-level parallel processing tools introduced by HEVC, including tile and wavefront parallel processing. The proposed design uses a deeply pipelined architecture to achieve a high clock rate. Additional techniques such as the state prefetch logic, latched-based context memory, and separate finite state machines are applied to minimize stall cycles, while multibypass- bin decoding is used to further increase the throughput. The design is implemented in an IBM 45nm SOI process. After place-and-route, its operating frequency reaches 1.6 GHz. The corresponding throughputs achieve up to 1696 and 2314 Mbin/s under common and theoretical worst-case test conditions, respectively. The results show that the design is sufficient to decode in real-time high-tier video bitstreams at level 6.2 (8K UHD at 120 fps), or main-tier bitstreams at level 5.1 (4K UHD at 60 fps) for applications requiring sub-frame latency, such as video conferencing.en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/TCSVT.2014.2363748en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceSzeen_US
dc.titleA Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-tier Applicationsen_US
dc.typeArticleen_US
dc.identifier.citationChen, Yu-Hsin, and Vivienne Sze. “A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-Tier Applications.” IEEE Trans. Circuits Syst. Video Technol. (2014): 1–1.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.approverSze, Vivienneen_US
dc.contributor.mitauthorChen, Yu-Hsinen_US
dc.contributor.mitauthorSze, Vivienneen_US
dc.relation.journalIEEE Transactions on Circuits and Systems for Video Technologyen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsChen, Yu-Hsin; Sze, Vivienneen_US
dc.identifier.orcidhttps://orcid.org/0000-0002-4403-956X
dc.identifier.orcidhttps://orcid.org/0000-0003-4841-3990
mit.licenseOPEN_ACCESS_POLICYen_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record