Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators
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© 2019 IEEE. This paper describes various design considerations for deep neural networks that enable them to operate efficiently and accurately on processing-in-memory accelerators. We highlight important properties of these accelerators and the resulting design considerations using experiments conducted on various state-of-the- art deep neural networks with the large-scale ImageNet dataset.
Date issued
2020-12Department
Massachusetts Institute of Technology. Microsystems Technology LaboratoriesJournal
Technical Digest - International Electron Devices Meeting, IEDM
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
2020. "Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators." Technical Digest - International Electron Devices Meeting, IEDM, 2019-December.
Version: Author's final manuscript