Notice
This is not the latest version of this item. The latest version can be found at:https://dspace.mit.edu/handle/1721.1/137180.2
Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators
Author(s)
Unknown author
DownloadAccepted version (566.0Kb)
Open Access Policy
Open Access Policy
Creative Commons Attribution-Noncommercial-Share Alike
Terms of use
Metadata
Show full item recordAbstract
© 2019 IEEE. This paper describes various design considerations for deep neural networks that enable them to operate efficiently and accurately on processing-in-memory accelerators. We highlight important properties of these accelerators and the resulting design considerations using experiments conducted on various state-of-the- art deep neural networks with the large-scale ImageNet dataset.
Date issued
2020-12Journal
Technical Digest - International Electron Devices Meeting, IEDM
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
2020. "Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators." Technical Digest - International Electron Devices Meeting, IEDM, 2019-December.
Version: Author's final manuscript